Pink Iguana

Home » Uncategorized » Computer Architecture

Computer Architecture

Advertisements

Joel Hruska, 26 Jun 2017, ExtremeTech, Major Hyper-Threading Flaw Destabilizes Intel Kaby Lake, Skylake CPUs, here.

Here’s how Intel describes the errata in its own documentation.

Errata: SKZ7/SKW144/SKL150/SKX150/SKZ7/KBL095/KBW095 Short Loops Which Use AH/BH/CH/DH Registers May Cause Unpredictable System Behavior.

Problem: Under complex micro-architectural conditions, short loops of less than 64 instructions that use AH, BH, CH or DH registers as well as their corresponding wider register (e.g. RAX, EAX or AX for AH) may cause unpredictable system behavior. This can only happen when both logical processors on the same physical processor are active.

Implication: Due to this erratum, the system may experience unpredictable system behavior.

 

Advertisements

Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out /  Change )

Google+ photo

You are commenting using your Google+ account. Log Out /  Change )

Twitter picture

You are commenting using your Twitter account. Log Out /  Change )

Facebook photo

You are commenting using your Facebook account. Log Out /  Change )

Connecting to %s

%d bloggers like this: