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New Cores

Omar Sohail, AMD’s 16 core Zen APU will go head to head with Intel’s upcoming Canonlake Core-i7 processors, here.

AMD’s current rivals in the processor and graphic chip industries happen to be Intel and NVIDIA respectively. In order to counter NVIDIA’s Maxwell lineup of graphic solutions, AMD will be launching its R9 300 series, with its flagship GPU, R9 390X fitted with High Bandwidth Memory in place of the traditional GDDR5 type memory for delivering superior gaming performance.

As for Intel, AMD is currently working on a 16 core Zen APU that will feature completely fully unlocked cores for superior multitasking performance. According to Fudzilla, the unnamed APU is expected to be released at an unknown period in 2016.

It is also expected that the processor is going to be processed on the 14 nm architecture, indicating that AMD might form an alliance with Samsung in the near future, since the South Korean firm and GlobalFoundaries are the only ones that can provide AMD access to the superior node.

Hassan Mujtaba, WCCFTech, Intel’s 6th Generation Skylake Processors Scheduled for 2H 2015, here.

So enough with the mobility parts, we will come back to them in a bit after detailing the desktop parts. Usually, server and desktop parts are considered the meat of any given CPU architecture showcasing their real potential and in 2015, Intel will launch two desktop parts, Broadwell-K and Skylake-S. We have given you details on these parts several times before but let’s do a recap. A recent roadmap update which was showcased two weeks ago revealed Broadwell-K (Unlocked) to be arriving in the 1H of 2015. Broadwell-K will be compatible with the LGA 1150 socketed motherboards featuring the 9-Series chipsets (Z97/H97). Broadwell-K is similar to Devil’s Canyon which were the enthusiast Haswell parts built for overclockers. You can call these Devil’s Canyon II (not an official name) and will be part of Intel’s 5th Generation Core family featuring the Core i5-5000 and Core i7-5000 series processors.

Intel Processor Roadmap Leaked, here.

Joel Hruska, Extreme Tech, Intel, eASIC in deal to build custom hardware, server solutions, here.

What’s less clear is exactly which workloads the new combined processors will be accelerating. eASIC notes that it will integrate its platform technology for use with future Xeon processors, but presumably it still intends to offer customizable chips — meaning individual customers like Facebook, Google, or Microsoft would be involved in the design process before ordering a specific number of cores with the custom ASIC + Xeon hardware.

Not only does this tie neatly to our recent discussion on Moore’s Law, where we highlighted how version 3.0 of the axiom involved on-die and system level integration, it also hints at where Intel will try to provide value. It’s not clear if Intel will be building the ASICs at its own fabrication plants or integrating them on-package, but either way, the company will try to argue that its advanced manufacturing techniques (and possibly process nodes) offer a compelling alternative to buying the ASIC and Xeon separately.

IBM announces silicon photonics breakthrough set to break 100Gb/s barrier, here.

In theory, silicon photonics could solve some major problems associated with the continued use of copper interconnects. One of the biggest problems with copper wire is that it doesn’t scale nearly as well as other vital parts of a modern CPU. Past a certain point, it becomes physically impossible to make copper wires any smaller without compromising their performance and/or lifespan. In theory, optical interconnects could transmit data for far less power while simultaneously moving information much more quickly.

Shadows of Itanium, here. Would have been fantastic in 1999.

Very Long Instruction Word processors are designed to execute many instructions simultaneously. A modern out-of-order processor, like Intel’s Haswell, can execute up to eight instructions (uops) per clock cycle. The Elbrus-4C, in contrast, can execute up to 23 instructions per cycle (again, under optimum conditions). The enormous difference in IPC is meant to offset the frequency gap — the Elbrus-4C is clocked at 800MHz, compared with 3GHz-4.4GHz for a modern Haswell.

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