David Kanter, real world technologies, What’s Next for Moore’s Law? For intel, III+V = 10nm QWFETs, here.
At this point, I’d like to share a series of predictions concerning Intel’s 10nm node. I first made these predictions in private with a few friends and colleagues back in 2012, but now is the time to make them rather public.
The industry will adopt Quantum Well FETs (QWFETs) that use a fin geometry and high-mobility channel materials to achieve excellent transistor performance at nominal operating voltages around 0.5V (compared to roughly 0.7V for FinFETs)
The industry will adopt III-V compound semiconductors (most likely In0.53Ga0.47As, alternatively InSb) for the n-type QWFET channel
The industry will adopt strained Germanium (most likely) or III-V materials (as an alternative) for the p-type QWFET channel
Intel will adopt QWFETs at the 10nm node (most likely), which will probably go into production in late 2015 or early 2016 (alternatively at 7nm in 2017 or 2018)
Intel will probably co-integrate conventional transistors and QWFETs, it is less likely (but possible) that the company will use separate substrates that are packaged together to optimize cost
The rest of the industry (e.g., Samsung, TSMC, Global Foundries) will wait until the 7nm node to use QWFETs